Data entry.
This commit is contained in:
Randy Thiemann
parent
6368948e45
commit
6f0d5d539c
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@ -0,0 +1,358 @@
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IF !DEF(CONSTANTS_ASM)
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DEF CONSTANTS_ASM EQU 1
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SECTION "Static Data", ROM0
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sPieceXOffsets:: ; How to draw each piece. X-offsets of the sprites.
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db 0, 8, 16, 24 ; I
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db 0, 8, 8, 16 ; Z
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db 0, 8, 8, 16 ; S
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db 0, 8, 16, 16 ; J
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db 0, 0, 8, 16 ; L
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db 8, 8, 16, 16 ; O
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db 0, 8, 8, 16 ; T
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sPieceYOffsets:: ; How to draw each piece. Y-offsets of the sprites.
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db 0, 0, 0, 0 ; I
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db 0, 0, 7, 7 ; Z
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db 7, 7, 0, 0 ; S
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db 0, 0, 0, 7 ; J
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db 7, 0, 0, 0 ; L
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db 0, 7, 0, 7 ; O
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db 0, 0, 7, 0 ; T
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sSpeedCurve:: ; Speed curve of the game.
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dw $0000 ; Level 0000
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db 0, %00000001 ; 1/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0100 ; Level 0100
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db 0, %00010001 ; 2/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0150 ; Level 0150
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db 0, %01001001 ; 3/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0200 ; Level 0200
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db 0, %01010101 ; 4/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0225 ; Level 0225
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db 0, %01011101 ; 5/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0250 ; Level 0250
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db 0, %01110111 ; 6/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0275 ; Level 0275
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db 0, %01111111 ; 7/8G
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db 25, 14, 30, 40 ; ARE, DAS, LOCK, LINECLEAR
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dw $0300 ; Level 0300
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db 1, %11111111 ; 1G
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db 25, 14, 30, 32 ; ARE, DAS, LOCK, LINECLEAR
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dw $0350 ; Level 0350
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db 2, %11111111 ; 2G
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db 25, 14, 30, 32 ; ARE, DAS, LOCK, LINECLEAR
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dw $0400 ; Level 0400
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db 3, %11111111 ; 3G
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db 25, 14, 30, 32 ; ARE, DAS, LOCK, LINECLEAR
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dw $0450 ; Level 0450
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db 4, %11111111 ; 4G
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db 25, 14, 30, 32 ; ARE, DAS, LOCK, LINECLEAR
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dw $0475 ; Level 0475
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db 5, %11111111 ; 5G
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db 25, 14, 30, 32 ; ARE, DAS, LOCK, LINECLEAR
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dw $0500 ; Level 0500
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db 20, %11111111 ; 20G
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db 25, 14, 30, 24 ; ARE, DAS, LOCK, LINECLEAR
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dw $0600 ; Level 0600
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db 20, %11111111 ; 20G
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db 25, 8, 30, 24 ; ARE, DAS, LOCK, LINECLEAR
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dw $0700 ; Level 0700
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db 20, %11111111 ; 20G
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db 20, 8, 30, 24 ; ARE, DAS, LOCK, LINECLEAR
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dw $0900 ; Level 0900
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db 20, %11111111 ; 20G
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db 16, 6, 25, 16 ; ARE, DAS, LOCK, LINECLEAR
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dw $1100 ; Level 1100
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db 20, %11111111 ; 20G
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db 12, 6, 25, 16 ; ARE, DAS, LOCK, LINECLEAR
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dw $1200 ; Level 1200
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db 20, %11111111 ; 20G
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db 12, 6, 25, 8 ; ARE, DAS, LOCK, LINECLEAR
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dw $1300 ; Level 1300
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db 20, %11111111 ; 20G
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db 10, 6, 20, 7 ; ARE, DAS, LOCK, LINECLEAR
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dw $1400 ; Level 1400
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db 20, %11111111 ; 20G
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db 10, 6, 18, 6 ; ARE, DAS, LOCK, LINECLEAR
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dw $1500 ; Level 1500
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db 20, %11111111 ; 20G
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db 8, 4, 16, 5 ; ARE, DAS, LOCK, LINECLEAR
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dw $1600 ; Level 1600
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db 20, %11111111 ; 20G
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db 8, 4, 14, 4 ; ARE, DAS, LOCK, LINECLEAR
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dw $1700 ; Level 1700
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db 20, %11111111 ; 20G
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db 6, 4, 12, 3 ; ARE, DAS, LOCK, LINECLEAR
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dw $1800 ; Level 1800
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db 20, %11111111 ; 20G
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db 6, 4, 10, 3 ; ARE, DAS, LOCK, LINECLEAR
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dw $1900 ; Level 1900
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db 20, %11111111 ; 20G
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db 4, 4, 8, 3 ; ARE, DAS, LOCK, LINECLEAR
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dw $2000 ; Level 2000
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db 20, %11111111 ; 20G
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db 4, 3, 8, 3 ; ARE, DAS, LOCK, LINECLEAR
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dw $2500 ; Level 2500
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db 20, %11111111 ; 20G
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db 2, 1, 8, 2 ; ARE, DAS, LOCK, LINECLEAR
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dw $3000 ; Level 3000
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db 20, %11111111 ; 20G
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db 1, 1, 8, 1 ; ARE, DAS, LOCK, LINECLEAR
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dw $4000 ; Level 4000
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db 20, %11111111 ; 20G
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db 1, 1, 6, 1 ; ARE, DAS, LOCK, LINECLEAR
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dw $5000 ; Level 5000
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db 20, %11111111 ; 20G
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db 1, 1, 4, 1 ; ARE, DAS, LOCK, LINECLEAR
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dw $6666 ; Level 6666
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db 20, %11111111 ; 20G
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db 1, 1, 2, 1 ; ARE, DAS, LOCK, LINECLEAR
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dw $9999 ; Level 9999
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db 20, %11111111 ; 20G
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db 1, 1, 1, 1 ; ARE, DAS, LOCK, LINECLEAR
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sPieceRotationStates:: ; How each piece is rotated.
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; I
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db %0000
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db %1111
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db %0000
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db %0000
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db %0010
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db %0010
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db %0010
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db %0010
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db %0000
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db %1111
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db %0000
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db %0000
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db %0010
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db %0010
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db %0010
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db %0010
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; Z
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db %0000
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db %1100
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db %0110
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db %0000
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db %0010
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db %0110
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db %0100
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db %0000
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db %0000
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db %1100
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db %0110
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db %0000
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db %0010
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db %0110
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db %0100
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db %0000
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; S
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db %0000
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db %0110
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db %1100
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db %0000
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db %1000
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db %1100
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db %0100
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db %0000
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db %0000
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db %0110
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db %1100
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db %0000
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db %1000
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db %1100
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db %0100
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db %0000
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; J
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db %0000
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db %1110
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db %0010
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db %0000
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db %0110
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db %0100
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db %0100
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db %0000
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db %0000
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db %1000
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db %1110
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db %0000
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db %0100
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db %0100
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db %1100
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db %0000
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; L
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db %0000
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db %1110
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db %1000
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db %0000
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db %0100
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db %0100
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db %0110
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db %0000
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db %0000
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db %0010
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db %1110
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db %0000
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db %1100
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db %0100
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db %0100
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db %0000
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; O
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db %0000
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db %0110
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db %0110
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db %0000
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db %0000
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db %0110
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db %0110
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db %0000
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db %0000
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db %0110
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db %0110
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db %0000
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db %0000
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db %0110
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db %0110
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db %0000
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; T
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db %0000
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db %1110
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db %0100
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db %0000
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db %0100
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db %0110
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db %0100
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db %0000
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db %0000
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db %0100
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db %1110
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db %0000
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db %0100
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db %1100
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db %0100
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db %0000
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DEF PALETTE_REGULAR EQU %11100100
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DEF PALETTE_INVERTED EQU %00011011
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DEF PALETTE_MONO_0 EQU %11111111
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DEF PALETTE_MONO_1 EQU %10101010
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DEF PALETTE_MONO_2 EQU %01010101
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DEF PALETTE_MONO_3 EQU %00000000
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DEF PALETTE_DARKER_0 EQU %11100100
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DEF PALETTE_DARKER_1 EQU %11111001
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DEF PALETTE_DARKER_2 EQU %11111110
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DEF PALETTE_DARKER_3 EQU %11111111
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DEF PALETTE_LIGHTER_0 EQU %11100100
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DEF PALETTE_LIGHTER_1 EQU %10010000
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DEF PALETTE_LIGHTER_2 EQU %01000000
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DEF PALETTE_LIGHTER_3 EQU %00000000
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DEF FIELD_TOP_LEFT EQU $9800+(0*32)+1
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DEF FIELD_ROW_1 EQU $9800+(0*32)+1
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DEF FIELD_ROW_2 EQU $9800+(1*32)+1
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DEF FIELD_ROW_3 EQU $9800+(2*32)+1
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DEF FIELD_ROW_4 EQU $9800+(3*32)+1
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DEF FIELD_ROW_5 EQU $9800+(4*32)+1
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DEF FIELD_ROW_6 EQU $9800+(5*32)+1
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DEF FIELD_ROW_7 EQU $9800+(6*32)+1
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DEF FIELD_ROW_8 EQU $9800+(7*32)+1
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DEF FIELD_ROW_9 EQU $9800+(8*32)+1
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DEF FIELD_ROW_10 EQU $9800+(9*32)+1
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DEF FIELD_ROW_11 EQU $9800+(10*32)+1
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DEF FIELD_ROW_12 EQU $9800+(11*32)+1
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DEF FIELD_ROW_13 EQU $9800+(12*32)+1
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DEF FIELD_ROW_14 EQU $9800+(13*32)+1
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DEF FIELD_ROW_15 EQU $9800+(14*32)+1
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DEF FIELD_ROW_16 EQU $9800+(15*32)+1
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DEF FIELD_ROW_17 EQU $9800+(16*32)+1
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DEF FIELD_ROW_18 EQU $9800+(17*32)+1
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DEF FIELD_ROW_19 EQU $9800+(18*32)+1
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DEF FIELD_ROW_20 EQU $9800+(19*32)+1
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DEF TILE_FIELD_EMPTY EQU 7
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DEF TILE_PIECE_0 EQU 10
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DEF TILE_0 EQU 110
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DEF NEXT_BASE_X EQU 120
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DEF NEXT_BASE_Y EQU 40
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DEF HOLD_BASE_X EQU 120
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DEF HOLD_BASE_Y EQU 80
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DEF DIGIT_BASE_X EQU 112
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DEF SCORE_BASE_Y EQU 115
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DEF CLEVEL_BASE_Y EQU 136
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DEF NLEVEL_BASE_Y EQU 148
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DEF SCURVE_N_ENTRIES EQU 32
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DEF SCURVE_ENTRY_SIZE EQU 8
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DEF PIECE_I EQU 0
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DEF PIECE_Z EQU 1
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DEF PIECE_S EQU 2
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DEF PIECE_J EQU 3
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DEF PIECE_L EQU 4
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DEF PIECE_O EQU 5
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DEF PIECE_T EQU 6
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ENDC
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@ -1,110 +1,25 @@
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; *****************************************************************************
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; * *
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; * Libraries and Defines *
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; * *
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; *****************************************************************************
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IF !DEF(GLOBALS_ASM)
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DEF GLOBALS_ASM EQU 1
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INCLUDE "vendor/hardware.inc"
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INCLUDE "vendor/structs.asm"
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INCLUDE "constants.asm"
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; *****************************************************************************
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; * *
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; * Game Variables *
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; * *
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; *****************************************************************************
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SECTION "General Game Variables", WRAM0
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wLCDCCtr:: db
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wEvenFrame:: db
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wField:: ds (10*22)
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wRNGSeed:: ds 4
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SECTION "Important Game Variables", HRAM
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hCtr:: ds 1
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hScore:: ds 6
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hCLevel:: ds 6
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hNLevel:: ds 6
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; *****************************************************************************
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; * *
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; * Static Data *
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; * *
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; *****************************************************************************
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SECTION "Static Data", ROM0
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sPieceXOffsets::
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db 0, 8, 16, 24 ; I
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db 0, 8, 8, 16 ; Z
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db 0, 8, 8, 16 ; S
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db 0, 8, 16, 16 ; J
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db 0, 0, 8, 16 ; L
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db 8, 8, 16, 16 ; O
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db 0, 8, 8, 16 ; T
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sPieceYOffsets::
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db 0, 0, 0, 0 ; I
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db 0, 0, 7, 7 ; Z
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db 7, 7, 0, 0 ; S
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db 0, 0, 0, 7 ; J
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db 0, 7, 0, 0 ; L
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db 0, 7, 0, 7 ; O
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db 0, 0, 7, 0 ; T
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; *****************************************************************************
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; * *
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; * Convenience Defines *
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; * *
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; *****************************************************************************
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DEF PALETTE_REGULAR EQU %11100100
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DEF PALETTE_INVERTED EQU %00011011
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DEF PALETTE_MONO_0 EQU %11111111
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DEF PALETTE_MONO_1 EQU %10101010
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DEF PALETTE_MONO_2 EQU %01010101
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DEF PALETTE_MONO_3 EQU %00000000
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DEF PALETTE_DARKER_0 EQU %11100100
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DEF PALETTE_DARKER_1 EQU %11111001
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DEF PALETTE_DARKER_2 EQU %11111110
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DEF PALETTE_DARKER_3 EQU %11111111
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DEF PALETTE_LIGHTER_0 EQU %11100100
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DEF PALETTE_LIGHTER_1 EQU %10010000
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DEF PALETTE_LIGHTER_2 EQU %01000000
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DEF PALETTE_LIGHTER_3 EQU %00000000
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DEF FIELD_TOP_LEFT EQU $9800+(0*32)+1
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DEF FIELD_ROW_1 EQU $9800+(0*32)+1
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DEF FIELD_ROW_2 EQU $9800+(1*32)+1
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DEF FIELD_ROW_3 EQU $9800+(2*32)+1
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DEF FIELD_ROW_4 EQU $9800+(3*32)+1
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DEF FIELD_ROW_5 EQU $9800+(4*32)+1
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DEF FIELD_ROW_6 EQU $9800+(5*32)+1
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DEF FIELD_ROW_7 EQU $9800+(6*32)+1
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DEF FIELD_ROW_8 EQU $9800+(7*32)+1
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DEF FIELD_ROW_9 EQU $9800+(8*32)+1
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DEF FIELD_ROW_10 EQU $9800+(9*32)+1
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DEF FIELD_ROW_11 EQU $9800+(10*32)+1
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DEF FIELD_ROW_12 EQU $9800+(11*32)+1
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DEF FIELD_ROW_13 EQU $9800+(12*32)+1
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DEF FIELD_ROW_14 EQU $9800+(13*32)+1
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DEF FIELD_ROW_15 EQU $9800+(14*32)+1
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DEF FIELD_ROW_16 EQU $9800+(15*32)+1
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DEF FIELD_ROW_17 EQU $9800+(16*32)+1
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DEF FIELD_ROW_18 EQU $9800+(17*32)+1
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DEF FIELD_ROW_19 EQU $9800+(18*32)+1
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DEF FIELD_ROW_20 EQU $9800+(19*32)+1
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DEF TILE_FIELD_EMPTY EQU 7
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DEF TILE_PIECE_0 EQU 10
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DEF TILE_0 EQU 110
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DEF NEXT_BASE_X EQU 120
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DEF NEXT_BASE_Y EQU 40
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DEF HOLD_BASE_X EQU 120
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DEF HOLD_BASE_Y EQU 80
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DEF DIGIT_BASE_X EQU 112
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DEF SCORE_BASE_Y EQU 115
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DEF CLEVEL_BASE_Y EQU 136
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DEF NLEVEL_BASE_Y EQU 148
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; *****************************************************************************
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; * *
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; * Convenience Macros *
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; * *
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; *****************************************************************************
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; Waits for VRAM to be safe to access. (Includes hblank.)
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MACRO wait_vram
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.waitvram\@
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@ -113,6 +28,7 @@ MACRO wait_vram
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jr nz, .waitvram\@
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ENDM
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; Waits for lcd to be in vblank.
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MACRO wait_vblank
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.waitvb\@
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@ -122,6 +38,7 @@ MACRO wait_vblank
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jr nz, .waitvb\@
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ENDM
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; Waits for lcd to not be in vblank.
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MACRO wait_vblank_end
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.waitvbe\@
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@ -131,21 +48,25 @@ MACRO wait_vblank_end
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jr z, .waitvbe\@
|
||||
ENDM
|
||||
|
||||
|
||||
; Sets the background palette to A.
|
||||
MACRO set_bg_palette
|
||||
ldh [rBGP], a
|
||||
ENDM
|
||||
|
||||
|
||||
; Sets the object0 palette to A.
|
||||
MACRO set_obj0_palette
|
||||
ldh [rOBP0], a
|
||||
ENDM
|
||||
|
||||
|
||||
; Sets the object1 palette to A.
|
||||
MACRO set_obj1_palette
|
||||
ldh [rOBP1], a
|
||||
ENDM
|
||||
|
||||
|
||||
; Sets all palettes to A.
|
||||
MACRO set_all_palettes
|
||||
set_bg_palette a
|
||||
|
|
@ -158,3 +79,6 @@ ENDM
|
|||
MACRO lb
|
||||
ld \1, (LOW(\2) << 8) | LOW(\3)
|
||||
ENDM
|
||||
|
||||
|
||||
ENDC
|
||||
|
|
|
|||
|
|
@ -1,34 +0,0 @@
|
|||
SECTION "Hardware Control Functions", ROM0
|
||||
DisableAudio::
|
||||
xor a, a
|
||||
ldh [rNR52], a
|
||||
ret
|
||||
|
||||
|
||||
DisableLCDKeepingSettings::
|
||||
ldh a, [rLCDC]
|
||||
and LOW(~LCDCF_ON)
|
||||
wait_vram
|
||||
ldh [rLCDC], a
|
||||
ret
|
||||
|
||||
|
||||
DisableLCD::
|
||||
wait_vram
|
||||
xor a, a
|
||||
ldh [rLCDC], a
|
||||
ret
|
||||
|
||||
|
||||
EnableLCD::
|
||||
ldh a, [rLCDC]
|
||||
or LCDCF_ON | LCDCF_BGON | LCDCF_OBJON
|
||||
ldh [rLCDC], a
|
||||
ret
|
||||
|
||||
|
||||
SetTileDataBanks::
|
||||
ldh a, [rLCDC]
|
||||
or LCDCF_BLK01
|
||||
ldh [rLCDC], a
|
||||
ret
|
||||
|
|
@ -1,3 +1,7 @@
|
|||
IF !DEF(INTERRUPTS_ASM)
|
||||
DEF INTERRUPTS_ASM EQU 1
|
||||
|
||||
|
||||
SECTION "Interrupt Initialization Functions", ROM0
|
||||
InitializeLCDCInterrupt::
|
||||
ld a, STATF_LYC
|
||||
|
|
@ -52,3 +56,5 @@ LCDCInterrupt_End:
|
|||
pop af
|
||||
reti
|
||||
|
||||
|
||||
ENDC
|
||||
|
|
|
|||
|
|
@ -1,3 +1,7 @@
|
|||
IF !DEF(MEMORY_ASM)
|
||||
DEF MEMORY_ASM EQU 1
|
||||
|
||||
|
||||
SECTION "Memory Functions", ROM0
|
||||
; Copies data from de to hl, bc bytes
|
||||
UnsafeMemCopy::
|
||||
|
|
@ -32,3 +36,6 @@ UnsafeMemSet::
|
|||
or a, c
|
||||
jp nz, UnsafeMemSet
|
||||
ret
|
||||
|
||||
|
||||
ENDC
|
||||
|
|
@ -22,7 +22,7 @@
|
|||
; SOFTWARE.
|
||||
|
||||
|
||||
|
||||
IF !DEF(STRUCTS_VERSION)
|
||||
DEF STRUCTS_VERSION equs "3.0.1"
|
||||
MACRO structs_assert
|
||||
assert (\1), "rgbds-structs {STRUCTS_VERSION} bug. Please report at https://github.com/ISSOtm/rgbds-structs, and share the above stack trace *and* your code there!"
|
||||
|
|
@ -336,3 +336,5 @@ MACRO dstructs ; nb_structs, struct_type, instance_name
|
|||
ENDR
|
||||
PURGE STRUCT_ID
|
||||
ENDM
|
||||
|
||||
ENDC
|
||||
|
|
|
|||
Loading…
Reference in New Issue