Improve SFX routines

This commit is contained in:
Randy Thiemann 2023-10-17 07:41:11 +02:00
parent 89e311ac5d
commit 75a916f370
8 changed files with 1842 additions and 310 deletions

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@ -104,6 +104,10 @@ DEF PIECE_L EQU 4
DEF PIECE_O EQU 5 DEF PIECE_O EQU 5
DEF PIECE_T EQU 6 DEF PIECE_T EQU 6
DEF PIECE_NONE EQU 255 DEF PIECE_NONE EQU 255
DEF SFX_IRS EQU 7
DEF SFX_DROP EQU 8
DEF SFX_LOCK EQU 9
DEF SFX_BELL EQU 10
ENDC ENDC

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240
src/res/sources/sfxparse.py Normal file
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@ -0,0 +1,240 @@
from construct import Struct, Const, Int32ul, Int16ul, Int8ul, Bytes
vgm_header = Struct(
"magic" / Const(b"Vgm "),
"eof_offset" / Int32ul,
"version" / Int32ul,
"sn76489_clock" / Int32ul,
"ym2413_clock" / Int32ul,
"gd3_offset" / Int32ul,
"total_samples" / Int32ul,
"loop_offset" / Int32ul,
"loop_samples" / Int32ul,
"rate" / Int32ul,
"sn_fb" / Int16ul,
"sn_w" / Int8ul,
"sn_c" / Int8ul,
"ym2612_clock" / Int32ul,
"ym2151_clock" / Int32ul,
"vgm_data_offset" / Int32ul,
"seg_pcm_clock" / Int32ul,
"seg_pcm_intf_reg" / Int32ul,
"rf5c68_clock" / Int32ul,
"ym2203_clock" / Int32ul,
"ym2608_clock" / Int32ul,
"ym2610_clock" / Int32ul,
"ym3812_clock" / Int32ul,
"ym3526_clock" / Int32ul,
"y8950_clock" / Int32ul,
"ymf262_clock" / Int32ul,
"ymf278b_clock" / Int32ul,
"ymf271_clock" / Int32ul,
"ymz280b_clock" / Int32ul,
"rf5c164_clock" / Int32ul,
"pwm_clock" / Int32ul,
"ay8910_clock" / Int32ul,
"ay8910_type" / Int8ul,
"ay8910_flags" / Int8ul,
"ym2203_ay8910_flags" / Int8ul,
"ym2608_ay8910_flags" / Int8ul,
"volume_mod" / Int8ul,
"reserved_0" / Bytes(1),
"loop_base" / Int8ul,
"loop_modifier" / Int8ul,
"dmg_clock" / Int32ul,
"nes_apu_clock" / Int32ul,
"multi_pcm_clock" / Int32ul,
"upd7759_clock" / Int32ul,
"okim6258_clock" / Int32ul,
"okim6258_flags" / Int8ul,
"k054539_flags" / Int8ul,
"c140_chip_type" / Int8ul,
"reserved_1" / Bytes(1),
"okim6295_clock" / Int32ul,
"k051649_k052539_clock" / Int32ul,
"k054539_clock" / Int32ul,
"huc6280_clock" / Int32ul,
"c140_clock" / Int32ul,
"k053260_clock" / Int32ul,
"pokey_clock" / Int32ul,
"qsound_clock" / Int32ul,
"scsp_clock" / Int32ul,
"extra_hdr_offset" / Int32ul,
"wonder_swan_clock" / Int32ul,
"vsu_clock" / Int32ul,
"saa1099_clock" / Int32ul,
"es5503_clock" / Int32ul,
"es5505_es5506_clock" / Int32ul,
"es5503_num_channels" / Int8ul,
"es5505_es5506_num_channels" / Int8ul,
"c352_clock_div" / Int8ul,
"reserved_2" / Bytes(1),
"x1_010_clock" / Int32ul,
"c352_clock" / Int32ul,
"ga20_clock" / Int32ul,
"reserved_3" / Bytes(28)
)
b3_command = Struct(
"command" / Const(b'\xB3'),
"reg" / Int8ul,
"data" / Int8ul
)
register_names = [
"REG_UNK", # 0x00
"REG_UNK", # 0x01
"REG_UNK", # 0x02
"REG_UNK", # 0x03
"REG_UNK", # 0x04
"REG_UNK", # 0x05
"REG_UNK", # 0x06
"REG_UNK", # 0x07
"REG_UNK", # 0x08
"REG_UNK", # 0x09
"REG_UNK", # 0x0A
"REG_UNK", # 0x0B
"REG_UNK", # 0x0C
"REG_UNK", # 0x0D
"REG_UNK", # 0x0E
"REG_UNK", # 0x0F
"REG_NR10_CH1_SWEEP", # 0x10
"REG_NR11_CH1_LENDT", # 0x11
"REG_NR12_CH1_VOLEV", # 0x12
"REG_NR13_CH1_FRQLO", # 0x13
"REG_NR14_CH1_FRQHI", # 0x14
"REG_UNK", # 0x15
"REG_NR21_CH2_LENDT", # 0x16
"REG_NR22_CH2_VOLEV", # 0x17
"REG_NR23_CH2_FRQLO", # 0x18
"REG_NR24_CH2_FRQHI", # 0x19
"REG_NR30_CH3_DACEN", # 0x1A
"REG_NR31_CH3_LENGT", # 0x1B
"REG_NR32_CH3_VOLUM", # 0x1C
"REG_NR33_CH3_FRQLO", # 0x1D
"REG_NR34_CH3_FRQHI", # 0x1E
"REG_UNK", # 0x1F
"REG_NR41_CH4_LENGT", # 0x20
"REG_NR42_CH4_VOLEV", # 0x21
"REG_NR43_CH4_FQRND", # 0x22
"REG_NR44_CH4_CNTRL", # 0x23
"REG_NR50_MVOLVINPN", # 0x24
"REG_NR51_MASTERPAN", # 0x25
"REG_NR52_MASTERCTL", # 0x26
"REG_UNK", # 0x27
"REG_UNK", # 0x28
"REG_UNK", # 0x29
"REG_UNK", # 0x2A
"REG_UNK", # 0x2B
"REG_UNK", # 0x2C
"REG_UNK", # 0x2D
"REG_UNK", # 0x2E
"REG_UNK", # 0x2F
"REG_WAVE_PATTERN_0", # 0x30
"REG_WAVE_PATTERN_1", # 0x31
"REG_WAVE_PATTERN_2", # 0x32
"REG_WAVE_PATTERN_3", # 0x33
"REG_WAVE_PATTERN_4", # 0x34
"REG_WAVE_PATTERN_5", # 0x35
"REG_WAVE_PATTERN_6", # 0x36
"REG_WAVE_PATTERN_7", # 0x37
"REG_WAVE_PATTERN_8", # 0x38
"REG_WAVE_PATTERN_9", # 0x39
"REG_WAVE_PATTERN_A", # 0x3A
"REG_WAVE_PATTERN_B", # 0x3B
"REG_WAVE_PATTERN_C", # 0x3C
"REG_WAVE_PATTERN_D", # 0x3D
"REG_WAVE_PATTERN_E", # 0x3E
"REG_WAVE_PATTERN_F", # 0x3F
]
sfx_names = [
"sSFXPieceI",
"sSFXPieceZ",
"sSFXPieceS",
"sSFXPieceJ",
"sSFXPieceL",
"sSFXPieceO",
"sSFXPieceT",
"sSFXIRS",
"sSFXDrop",
"sSFXLock",
"sSFXBell"
]
def chunks(lst, n):
for i in range(0, len(lst), n):
yield lst[i:i + n]
class DB:
l = []
def __init__(self):
self.l = []
def __str__(self):
out = []
for chunk in chunks(self.l, 8):
out.append(f" db {', '.join(chunk)}")
return "\n".join(out) + "\n"
def __repr__(self):
return str(self)
def __len__(self):
return len(self.l)
def add(self, *args):
if len(args) == 1:
self.l.append(f"${args[0]:02X}")
else:
self.l.append(register_names[args[0]])
self.l.append(f"${args[1]:02X}")
for c, v in enumerate(register_names):
if v != "REG_UNK":
print(f"DEF {v} EQU ${c:02X}")
print()
with open("sfx.vgm", "rb") as f:
data = f.read()
header = vgm_header.parse(data)
data_offset = 0x34 + header.vgm_data_offset
data = data[data_offset:]
db = DB()
ctr = 0
last = None
while len(data) > 0:
if data.startswith(b'\x67\x66'):
if len(db) > 0:
db.add(0xFE)
print(db)
print(f"{sfx_names[ctr-1]}End::")
db = DB()
print(f"{sfx_names[ctr]}::")
ctr += 1
last = None
data = data[3:]
data = data[Int32ul.parse(data) + 4:]
elif data.startswith(b'\xB3'):
b3 = b3_command.parse(data)
if last == 0x62:
print(db)
db = DB()
db.add(b3.reg + 0x10, b3.data)
last = 0xB3
data = data[3:]
elif data.startswith(b'\x62'):
db.add(0xFF)
last = 0x62
data = data[1:]
elif data.startswith(b'\x66'):
if len(db) > 0:
db.add(0xFE)
print(db)
print(f"{sfx_names[ctr-1]}End::")
break
else:
print(f"Unknown command: ${data[0]:02X}")
data = data[1:]

File diff suppressed because it is too large Load Diff

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@ -5,27 +5,578 @@ DEF SFX_ASM EQU 1
INCLUDE "globals.asm" INCLUDE "globals.asm"
DEF REG_NR10_CH1_SWEEP EQU $10
DEF REG_NR11_CH1_LENDT EQU $11
DEF REG_NR12_CH1_VOLEV EQU $12
DEF REG_NR13_CH1_FRQLO EQU $13
DEF REG_NR14_CH1_FRQHI EQU $14
DEF REG_NR21_CH2_LENDT EQU $16
DEF REG_NR22_CH2_VOLEV EQU $17
DEF REG_NR23_CH2_FRQLO EQU $18
DEF REG_NR24_CH2_FRQHI EQU $19
DEF REG_NR30_CH3_DACEN EQU $1A
DEF REG_NR31_CH3_LENGT EQU $1B
DEF REG_NR32_CH3_VOLUM EQU $1C
DEF REG_NR33_CH3_FRQLO EQU $1D
DEF REG_NR34_CH3_FRQHI EQU $1E
DEF REG_NR41_CH4_LENGT EQU $20
DEF REG_NR42_CH4_VOLEV EQU $21
DEF REG_NR43_CH4_FQRND EQU $22
DEF REG_NR44_CH4_CNTRL EQU $23
DEF REG_NR50_MVOLVINPN EQU $24
DEF REG_NR51_MASTERPAN EQU $25
DEF REG_NR52_MASTERCTL EQU $26
DEF REG_WAVE_PATTERN_0 EQU $30
DEF REG_WAVE_PATTERN_1 EQU $31
DEF REG_WAVE_PATTERN_2 EQU $32
DEF REG_WAVE_PATTERN_3 EQU $33
DEF REG_WAVE_PATTERN_4 EQU $34
DEF REG_WAVE_PATTERN_5 EQU $35
DEF REG_WAVE_PATTERN_6 EQU $36
DEF REG_WAVE_PATTERN_7 EQU $37
DEF REG_WAVE_PATTERN_8 EQU $38
DEF REG_WAVE_PATTERN_9 EQU $39
DEF REG_WAVE_PATTERN_A EQU $3A
DEF REG_WAVE_PATTERN_B EQU $3B
DEF REG_WAVE_PATTERN_C EQU $3C
DEF REG_WAVE_PATTERN_D EQU $3D
DEF REG_WAVE_PATTERN_E EQU $3E
DEF REG_WAVE_PATTERN_F EQU $3F
SECTION "Sound Effect Data", ROM0 SECTION "Sound Effect Data", ROM0
sSFXNextPieceI:: sSFXPieceI::
db $02, $F0, $07, $F0, $01, $BF, $01, $BF, $02, $F0, $03, $AC, $04, $85, $06, $7F, $06, $7F, $07, $80, $08, $14, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $ED, $04, $85, db REG_NR12_CH1_VOLEV, $F0, REG_NR22_CH2_VOLEV, $F0, REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF
db $06, $7F, $06, $7F, $07, $80, $08, $2D, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $27, $04, $86, $06, $7F, $06, $7F, $07, $80, $08, $44, $09, $87, $FF, $FF, $01, $BF, db REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $AC, REG_NR14_CH1_FRQHI, $85, REG_NR21_CH2_LENDT, $7F
db $01, $BF, $02, $F0, $03, $AC, $04, $85, $06, $7F, $06, $7F, $07, $80, $08, $14, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $ED, $04, $85, $06, $7F, $06, $7F, $07, $80, db REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80, REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87
db $08, $2D, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $27, $04, $86, $06, $7F, $06, $7F, $07, $80, $08, $44, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $5B, db $FF, $FF
db $04, $86, $06, $7F, $06, $7F, $07, $80, $08, $59, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $AC, $04, $85, $06, $7F, $06, $7F, $07, $80, $08, $14, $09, $87, $FF, $FF,
db $01, $BF, $01, $BF, $02, $F0, $03, $27, $04, $86, $06, $7F, $06, $7F, $07, $80, $08, $44, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $72, $04, $86, $06, $7F, $06, $7F, db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $ED
db $07, $80, $08, $62, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $D6, $04, $86, $06, $7F, $06, $7F, $07, $80, $08, $8A, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, db REG_NR14_CH1_FRQHI, $85, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db $03, $14, $04, $87, $06, $7F, $06, $7F, $07, $80, $08, $A2, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $39, $04, $87, $06, $7F, $06, $7F, $07, $80, $08, $B1, $09, $87, db REG_NR23_CH2_FRQLO, $2D, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $4F, $04, $87, $06, $7F, $06, $7F, $07, $80, $08, $BA, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $F0, $03, $62, $04, $87, $06, $7F,
db $06, $7F, $07, $80, $08, $C1, $09, $87, $FF, $FF, $07, $F0, $01, $BF, $01, $BF, $02, $D0, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $D0, $08, $39, $09, $87, $FF, $FF, $01, $BF, db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $27
db $01, $BF, $02, $D0, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $D0, $08, $39, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $D0, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $D0, db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db $08, $39, $09, $87, $FF, $FF, $FF, $FF, $FF, $FF, $01, $BF, $01, $BF, $02, $10, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $10, $08, $39, $09, $87, $FF, $FF, $01, $BF, $01, $BF, db REG_NR23_CH2_FRQLO, $44, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db $02, $10, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $10, $08, $39, $09, $87, $FF, $FF, $01, $BF, $01, $BF, $02, $10, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $10, $08, $39,
db $09, $87, $FF, $FF, $FF, $FF, $01, $BF, $01, $BF, $02, $00, $03, $6B, $04, $87, $06, $BF, $06, $BF, $07, $00, $08, $39, $09, $87, $FF, $FF, $FF, $FF, $02, $08, $03, $6B, $04, $87, db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $AC
db $07, $08, $08, $39, $09, $87, $FE db REG_NR14_CH1_FRQHI, $85, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $ED
db REG_NR14_CH1_FRQHI, $85, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $2D, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $27
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $44, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $5B
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $59, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $AC
db REG_NR14_CH1_FRQHI, $85, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $27
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $44, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $72
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $62, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $D6
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $8A, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $14
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $A2, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $B1, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $4F
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $BA, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $62
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $80
db REG_NR23_CH2_FRQLO, $C1, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR22_CH2_VOLEV, $F0, REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $D0
db REG_NR13_CH1_FRQLO, $6B, REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF
db REG_NR22_CH2_VOLEV, $D0, REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $D0, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $D0
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $D0, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $D0
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $00, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $00
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $6B, REG_NR14_CH1_FRQHI, $87, REG_NR22_CH2_VOLEV, $08
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FE
sSFXPieceIEnd::
sSFXPieceZ::
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $7B
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $4F
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $2D
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $F7
db REG_NR14_CH1_FRQHI, $86, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $D6
db REG_NR24_CH2_FRQHI, $86, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $7B
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $4F
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $2D
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $F7
db REG_NR14_CH1_FRQHI, $86, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $D6
db REG_NR24_CH2_FRQHI, $86, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $7B
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10, REG_NR23_CH2_FRQLO, $4F
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10, REG_NR23_CH2_FRQLO, $2D
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $F7
db REG_NR14_CH1_FRQHI, $86, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10, REG_NR23_CH2_FRQLO, $D6
db REG_NR24_CH2_FRQHI, $86, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $F7, REG_NR14_CH1_FRQHI, $86, $FF, $FF
db REG_NR22_CH2_VOLEV, $08, REG_NR23_CH2_FRQLO, $D6, REG_NR24_CH2_FRQHI, $86, $FE
sSFXPieceZEnd::
sSFXPieceS::
db REG_NR12_CH1_VOLEV, $F0, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0
db REG_NR13_CH1_FRQLO, $6B, REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $59
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $21
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR22_CH2_VOLEV, $F0, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0
db REG_NR13_CH1_FRQLO, $39, REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F
db REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $6B, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $7B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $7B, REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F
db REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $59, REG_NR24_CH2_FRQHI, $87
db $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $21
db REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $6B
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $7B, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $59
db REG_NR14_CH1_FRQHI, $87, REG_NR22_CH2_VOLEV, $08, REG_NR23_CH2_FRQLO, $7B, REG_NR24_CH2_FRQHI, $87
db $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $21
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $7B
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $7B, REG_NR14_CH1_FRQHI, $87, $FE
sSFXPieceSEnd::
sSFXPieceJ::
db REG_NR12_CH1_VOLEV, $F1, REG_NR22_CH2_VOLEV, $F1, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F
db REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $E7, REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F
db REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1, REG_NR23_CH2_FRQLO, $59, REG_NR24_CH2_FRQHI, $87
db $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $72
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1
db REG_NR23_CH2_FRQLO, $D6, REG_NR24_CH2_FRQHI, $86, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $B2
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1
db REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $B2, REG_NR14_CH1_FRQHI, $86, REG_NR22_CH2_VOLEV, $08
db REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, $FE
sSFXPieceJEnd::
sSFXPieceL::
db REG_NR12_CH1_VOLEV, $F0, REG_NR22_CH2_VOLEV, $F0, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F
db REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $9E, REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F
db REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $06, REG_NR24_CH2_FRQHI, $87
db $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $C4
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F0
db REG_NR23_CH2_FRQLO, $21, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $E7
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F0
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $9E
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $06, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $C4
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $21, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $E7
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $9E
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $06, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $C4
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $21, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $E7
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $E7, REG_NR14_CH1_FRQHI, $86, REG_NR22_CH2_VOLEV, $08
db REG_NR23_CH2_FRQLO, $39, REG_NR24_CH2_FRQHI, $87, $FE
sSFXPieceLEnd::
sSFXPieceO::
db REG_NR22_CH2_VOLEV, $F0, REG_NR32_CH3_VOLUM, $20, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF
db REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, REG_NR30_CH3_DACEN, $00
db REG_WAVE_PATTERN_0, $FF, REG_WAVE_PATTERN_1, $ED, REG_WAVE_PATTERN_2, $CB, REG_WAVE_PATTERN_3, $A9
db REG_WAVE_PATTERN_4, $87, REG_WAVE_PATTERN_5, $65, REG_WAVE_PATTERN_6, $43, REG_WAVE_PATTERN_7, $21
db REG_WAVE_PATTERN_8, $12, REG_WAVE_PATTERN_9, $34, REG_WAVE_PATTERN_A, $56, REG_WAVE_PATTERN_B, $78
db REG_WAVE_PATTERN_C, $9A, REG_WAVE_PATTERN_D, $BC, REG_WAVE_PATTERN_E, $DE, REG_WAVE_PATTERN_F, $FF
db REG_NR30_CH3_DACEN, $00, REG_NR30_CH3_DACEN, $80, REG_NR32_CH3_VOLUM, $20, REG_NR33_CH3_FRQLO, $B2
db REG_NR34_CH3_FRQHI, $86, $FF, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $F7
db REG_NR24_CH2_FRQHI, $86, REG_NR30_CH3_DACEN, $00, REG_NR30_CH3_DACEN, $80, REG_NR32_CH3_VOLUM, $20
db REG_NR33_CH3_FRQLO, $89, REG_NR34_CH3_FRQHI, $86, $FF, $FF, $FF, $FF, $FF
db REG_NR22_CH2_VOLEV, $08, REG_NR23_CH2_FRQLO, $F7, REG_NR24_CH2_FRQHI, $86, REG_NR32_CH3_VOLUM, $00
db REG_NR33_CH3_FRQLO, $89, REG_NR34_CH3_FRQHI, $06, $FF, $FF, $FF
db REG_NR32_CH3_VOLUM, $60, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $40
db REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, REG_NR30_CH3_DACEN, $00, REG_NR30_CH3_DACEN, $80
db REG_NR32_CH3_VOLUM, $60, REG_NR33_CH3_FRQLO, $B2, REG_NR34_CH3_FRQHI, $86, $FF, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $40, REG_NR23_CH2_FRQLO, $F7
db REG_NR24_CH2_FRQHI, $86, REG_NR30_CH3_DACEN, $00, REG_NR30_CH3_DACEN, $80, REG_NR32_CH3_VOLUM, $60
db REG_NR33_CH3_FRQLO, $89, REG_NR34_CH3_FRQHI, $86, $FF, $FF, $FF, $FF, $FF
db REG_NR22_CH2_VOLEV, $08, REG_NR23_CH2_FRQLO, $F7, REG_NR24_CH2_FRQHI, $86, REG_NR32_CH3_VOLUM, $00
db REG_NR33_CH3_FRQLO, $89, REG_NR34_CH3_FRQHI, $06, $FF, $FF, $FF
db REG_NR32_CH3_VOLUM, $00, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $14, REG_NR24_CH2_FRQHI, $87, REG_NR30_CH3_DACEN, $00, REG_NR30_CH3_DACEN, $80
db REG_NR32_CH3_VOLUM, $00, REG_NR33_CH3_FRQLO, $B2, REG_NR34_CH3_FRQHI, $86, $FF, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $F7
db REG_NR24_CH2_FRQHI, $86, REG_NR30_CH3_DACEN, $00, REG_NR30_CH3_DACEN, $80, REG_NR32_CH3_VOLUM, $00
db REG_NR33_CH3_FRQLO, $89, REG_NR34_CH3_FRQHI, $86, $FF, $FF, $FF, $FF, $FF
db REG_NR22_CH2_VOLEV, $08, REG_NR23_CH2_FRQLO, $F7, REG_NR24_CH2_FRQHI, $86, REG_NR32_CH3_VOLUM, $00
db REG_NR33_CH3_FRQLO, $89, REG_NR34_CH3_FRQHI, $06, $FE
sSFXPieceOEnd::
sSFXPieceT::
db REG_NR12_CH1_VOLEV, $F0, REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0
db REG_NR13_CH1_FRQLO, $8A, REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF
db REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $62, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $2D
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $06
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $D6
db REG_NR14_CH1_FRQHI, $86, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $F7
db REG_NR24_CH2_FRQHI, $86, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $14
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $2D
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $62
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $F0, REG_NR23_CH2_FRQLO, $8A
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $D6
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20
db REG_NR23_CH2_FRQLO, $06, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $F7
db REG_NR24_CH2_FRQHI, $86, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $14
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $2D
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $20, REG_NR13_CH1_FRQLO, $62
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $20, REG_NR23_CH2_FRQLO, $8A
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $D6
db REG_NR14_CH1_FRQHI, $86, REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10
db REG_NR23_CH2_FRQLO, $06, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10, REG_NR23_CH2_FRQLO, $F7
db REG_NR24_CH2_FRQHI, $86, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $14
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10, REG_NR23_CH2_FRQLO, $2D
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $BF, REG_NR11_CH1_LENDT, $BF, REG_NR12_CH1_VOLEV, $10, REG_NR13_CH1_FRQLO, $62
db REG_NR14_CH1_FRQHI, $87, $FF, $FF
db REG_NR21_CH2_LENDT, $BF, REG_NR21_CH2_LENDT, $BF, REG_NR22_CH2_VOLEV, $10, REG_NR23_CH2_FRQLO, $8A
db REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $62, REG_NR14_CH1_FRQHI, $87, REG_NR22_CH2_VOLEV, $08
db REG_NR23_CH2_FRQLO, $8A, REG_NR24_CH2_FRQHI, $87, $FE
sSFXPieceTEnd::
sSFXIRS::
db REG_NR42_CH4_VOLEV, $F2, REG_NR41_CH4_LENGT, $3F, REG_NR42_CH4_VOLEV, $F2, REG_NR43_CH4_FQRND, $44
db REG_NR44_CH4_CNTRL, $80, $FF
db REG_NR43_CH4_FQRND, $15, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $01, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR12_CH1_VOLEV, $F1, REG_NR22_CH2_VOLEV, $F1, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F
db REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $6B, REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F
db REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81, REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87
db REG_NR42_CH4_VOLEV, $08, REG_NR43_CH4_FQRND, $44, REG_NR44_CH4_CNTRL, $80, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $9D
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81
db REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $B6
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81
db REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $C5
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81
db REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $CE
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81
db REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $D6
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81
db REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $D9
db REG_NR14_CH1_FRQHI, $87, REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $81
db REG_NR23_CH2_FRQLO, $DF, REG_NR24_CH2_FRQHI, $87, $FE
sSFXIRSEnd::
sSFXDrop::
db REG_NR12_CH1_VOLEV, $F0, REG_NR42_CH4_VOLEV, $F1, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F
db REG_NR12_CH1_VOLEV, $F0, REG_NR13_CH1_FRQLO, $9D, REG_NR14_CH1_FRQHI, $84, REG_NR41_CH4_LENGT, $3F
db REG_NR42_CH4_VOLEV, $F1, REG_NR43_CH4_FQRND, $57, REG_NR44_CH4_CNTRL, $80, $FF
db REG_NR13_CH1_FRQLO, $12, REG_NR14_CH1_FRQHI, $03, $FF
db REG_NR13_CH1_FRQLO, $D2, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $80, REG_NR13_CH1_FRQLO, $39
db REG_NR14_CH1_FRQHI, $81, REG_NR41_CH4_LENGT, $3F, REG_NR42_CH4_VOLEV, $F1, REG_NR43_CH4_FQRND, $47
db REG_NR44_CH4_CNTRL, $80, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $80, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FF
db REG_NR13_CH1_FRQLO, $01, REG_NR14_CH1_FRQHI, $00, $FE
sSFXDropEnd::
sSFXLock::
db REG_NR42_CH4_VOLEV, $F2, REG_NR41_CH4_LENGT, $3F, REG_NR42_CH4_VOLEV, $12, REG_NR43_CH4_FQRND, $14
db REG_NR44_CH4_CNTRL, $80, $FF
db REG_NR43_CH4_FQRND, $00, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $00, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR41_CH4_LENGT, $3F, REG_NR42_CH4_VOLEV, $F2, REG_NR43_CH4_FQRND, $A4, REG_NR44_CH4_CNTRL, $80
db $FF
db REG_NR43_CH4_FQRND, $75, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $55, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $35, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $14, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $00, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR41_CH4_LENGT, $3F, REG_NR42_CH4_VOLEV, $22, REG_NR43_CH4_FQRND, $A4, REG_NR44_CH4_CNTRL, $80
db $FF
db REG_NR43_CH4_FQRND, $75, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $55, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR41_CH4_LENGT, $3F, REG_NR42_CH4_VOLEV, $12, REG_NR43_CH4_FQRND, $A4, REG_NR44_CH4_CNTRL, $80
db $FF
db REG_NR43_CH4_FQRND, $75, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $55, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $35, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $14, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $00, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $00, REG_NR44_CH4_CNTRL, $00, $FF
db REG_NR43_CH4_FQRND, $00, REG_NR44_CH4_CNTRL, $00, $FE
sSFXLockEnd::
sSFXBell::
db REG_NR12_CH1_VOLEV, $F1, REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1
db REG_NR13_CH1_FRQLO, $A7, REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1, REG_NR23_CH2_FRQLO, $97
db REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $A7
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1, REG_NR23_CH2_FRQLO, $97
db REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $A7
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1, REG_NR23_CH2_FRQLO, $97
db REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR11_CH1_LENDT, $7F, REG_NR11_CH1_LENDT, $7F, REG_NR12_CH1_VOLEV, $F1, REG_NR13_CH1_FRQLO, $A7
db REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR21_CH2_LENDT, $7F, REG_NR21_CH2_LENDT, $7F, REG_NR22_CH2_VOLEV, $F1, REG_NR23_CH2_FRQLO, $97
db REG_NR24_CH2_FRQHI, $87, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF, $FF
db $FF
db REG_NR12_CH1_VOLEV, $08, REG_NR13_CH1_FRQLO, $A7, REG_NR14_CH1_FRQHI, $87, $FF, $FF, $FF, $FF
db REG_NR22_CH2_VOLEV, $08, REG_NR23_CH2_FRQLO, $97, REG_NR24_CH2_FRQHI, $87, $FE
sSFXBellEnd::
SECTION "SFX Variables", HRAM SECTION "SFX Variables", HRAM
hPlayhead:: ds 2 hPlayhead:: ds 2
hPlayQueue:: ds 4
SECTION "SFX Functions", ROM0 SECTION "SFX Functions", ROM0
@ -38,17 +589,189 @@ SFXInit::
ld a, $77 ld a, $77
ldh [rNR50], a ldh [rNR50], a
;xor a, a ld a, $FF
;ldh [hPlayhead], a ldh [hPlayQueue], a
;ldh [hPlayhead+1], a ldh [hPlayQueue+1], a
ldh [hPlayQueue+2], a
ld a, LOW(sSFXNextPieceI) ldh [hPlayQueue+3], a
xor a, a
ldh [hPlayhead], a ldh [hPlayhead], a
ld a, HIGH(sSFXNextPieceI)
ldh [hPlayhead+1], a ldh [hPlayhead+1], a
ret ret
SFXPopQueue:
; Pop the head of the queue into A, the tail of the queue will be set to $FF.
ldh a, [hPlayQueue]
ld b, a
ldh a, [hPlayQueue+1]
ldh [hPlayQueue], a
ldh a, [hPlayQueue+2]
ldh [hPlayQueue+1], a
ldh a, [hPlayQueue+3]
ldh [hPlayQueue+2], a
ld a, $FF
ldh [hPlayQueue+3], a
ld a, b
ret
SFXPushQueue:
; Push A onto the tail of the queue, the head of the queue will be pushed off.
ld b, a
ldh a, [hPlayQueue+1]
ldh [hPlayQueue], a
ldh a, [hPlayQueue+2]
ldh [hPlayQueue+1], a
ldh a, [hPlayQueue+3]
ldh [hPlayQueue+2], a
ld a, b
ldh [hPlayQueue+3], a
ret
SFXProcessQueue:
; Clear the playhead.
xor a, a
ldh [hPlayhead], a
ldh [hPlayhead+1], a
; Try 4 times to pop a sound effect off the queue.
call SFXPopQueue
cp a, $FF
jr nz, :+
call SFXPopQueue
cp a, $FF
jr nz, :+
call SFXPopQueue
cp a, $FF
jr nz, :+
call SFXPopQueue
cp a, $FF
ret z
; If we got a valid sound effect, then play it.
call SFXEnqueue
ret
; Attempt to play the sound effect in A. Will enqueue the sound effect if the play routine is currently busy.
SFXEnqueue::
; If the playhead isn't null, then we're already playing something.
ld b, a
ldh a, [hPlayhead]
ld l, a
ldh a, [hPlayhead+1]
ld h, a
or a, l
jr z, :+
ld a, b
call SFXPushQueue
ret
; Play the sound effect for the sfx id in A.
: ld a, b
cp a, PIECE_I
jr nz, :+
ld a, LOW(sSFXPieceI)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceI)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, PIECE_S
jr nz, :+
ld a, LOW(sSFXPieceS)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceS)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, PIECE_Z
jr nz, :+
ld a, LOW(sSFXPieceZ)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceZ)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, PIECE_J
jr nz, :+
ld a, LOW(sSFXPieceJ)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceJ)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, PIECE_L
jr nz, :+
ld a, LOW(sSFXPieceL)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceL)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, PIECE_O
jr nz, :+
ld a, LOW(sSFXPieceO)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceO)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, PIECE_T
jr nz, :+
ld a, LOW(sSFXPieceT)
ldh [hPlayhead], a
ld a, HIGH(sSFXPieceT)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, SFX_IRS
jr nz, :+
ld a, LOW(sSFXIRS)
ldh [hPlayhead], a
ld a, HIGH(sSFXIRS)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, SFX_DROP
jr nz, :+
ld a, LOW(sSFXDrop)
ldh [hPlayhead], a
ld a, HIGH(sSFXDrop)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, SFX_LOCK
jr nz, :+
ld a, LOW(sSFXLock)
ldh [hPlayhead], a
ld a, HIGH(sSFXLock)
ldh [hPlayhead+1], a
call SFXPlay
ret
: cp a, SFX_BELL
ret nz
ld a, LOW(sSFXBell)
ldh [hPlayhead], a
ld a, HIGH(sSFXBell)
ldh [hPlayhead+1], a
call SFXPlay
ret
; This play routine must be called every frame.
SFXPlay:: SFXPlay::
; Load the playhead position into HL. ; Load the playhead position into HL.
ldh a, [hPlayhead] ldh a, [hPlayhead]
@ -65,12 +788,10 @@ SFXPlay::
ld a, [hl] ld a, [hl]
inc hl inc hl
; If it's $FE, then we're done. ; If it's $FE, then we're done. Check if there's more for us in the queue.
cp a, $FE cp a, $FE
jr nz, :+ jr nz, :+
xor a, a call SFXProcessQueue
ldh [hPlayhead], a
ldh [hPlayhead+1], a
ret ret
; If it's $FF, then we're done for this frame. ; If it's $FF, then we're done for this frame.
@ -78,7 +799,6 @@ SFXPlay::
jr z, .savePlayhead jr z, .savePlayhead
; Otherwise, put the register in C. ; Otherwise, put the register in C.
add a, $10
ld c, a ld c, a
; Get the value to write. ; Get the value to write.
@ -89,6 +809,7 @@ SFXPlay::
ldh [$ff00+c], a ldh [$ff00+c], a
jr .getRegister jr .getRegister
; Save the playhead position.
.savePlayhead .savePlayhead
ld a, l ld a, l
ldh [hPlayhead], a ldh [hPlayhead], a

View File

@ -140,6 +140,18 @@ fetchPieceMode:
ld a, [wNextPiece] ld a, [wNextPiece]
ld [wCurrentPiece], a ld [wCurrentPiece], a
call GetNextPiece call GetNextPiece
; Check if IRS is charged.
ld a, [hAState]
ld b, a
ld a, [hBState]
or a, b
jr z, :+
ld a, SFX_IRS
call SFXEnqueue
: ld a, [wNextPiece]
call SFXEnqueue
ld a, MODE_SPAWN_PIECE ld a, MODE_SPAWN_PIECE
ld [wMode], a ld [wMode], a
jp drawStaticInfo jp drawStaticInfo

View File

@ -1,5 +1,5 @@
#Emulicious settings file #Emulicious settings file
#Mon Oct 16 13:24:33 CEST 2023 #Tue Oct 17 07:32:01 CEST 2023
WindowEventViewerWindowHeight=861 WindowEventViewerWindowHeight=861
WindowEventViewerWindowDivider=309 WindowEventViewerWindowDivider=309
WindowMemoryTracerWindowY=631 WindowMemoryTracerWindowY=631
@ -198,8 +198,8 @@ GameBoyErrorBreakpointMessage32=
InterruptBreakpointCondition= InterruptBreakpointCondition=
Recent0=C\:\\workspace\\dmgtris\\bin\\out.gb Recent0=C\:\\workspace\\dmgtris\\bin\\out.gb
GameBoyErrorBreakpointMessage20= GameBoyErrorBreakpointMessage20=
WindowEmuliciousY=340 WindowEmuliciousY=316
WindowEmuliciousX=947 WindowEmuliciousX=619
GameBoyErrorBreakpointEnabled9=false GameBoyErrorBreakpointEnabled9=false
GameBoyErrorBreakpointEnabled8=false GameBoyErrorBreakpointEnabled8=false
GameBoyErrorBreakpointEnabled7=false GameBoyErrorBreakpointEnabled7=false
@ -242,7 +242,7 @@ Gamepad1Key0=-1
RomDir=C\:\\workspace\\dmgtris\\bin RomDir=C\:\\workspace\\dmgtris\\bin
GameBoyErrorBreakpointCondition20= GameBoyErrorBreakpointCondition20=
WindowVideoViewerHeight=1027 WindowVideoViewerHeight=1027
WindowEventViewerWindowOpen=false WindowEventViewerWindowOpen=true
WindowSpriteViewerY=512 WindowSpriteViewerY=512
WindowSpriteViewerX=320 WindowSpriteViewerX=320
CodeFontSize=13 CodeFontSize=13